Location
Job description
New ASIC Architect for MPU / XPU Memory.
Full-Time- Direct Hire- San Jose.
H1B Transfers and Canadian Visa Sponsorship are available.
Performance modeling for GPU memory subsystems and memory-semantics interconnects.
Architecting data and control planes for high-speed data movementDesigning and simulating I/O-heavy SoC architectures.
Own SoC and system architecture specs from inception through high-volume Release.
Strong background in computer architecture with a focus on memory systems and memory-semantics interconnects.Strong understanding of scale-up memory fabric and protocolsFamiliarity with GPU memory organization.Experience running detailed performance modeling for computing and/or data movement ASICs.
Familiarity with state-of-the-art distributed ML algorithms
Full-Time- Direct Hire- San Jose.
H1B Transfers and Canadian Visa Sponsorship are available.
Performance modeling for GPU memory subsystems and memory-semantics interconnects.
Architecting data and control planes for high-speed data movementDesigning and simulating I/O-heavy SoC architectures.
Own SoC and system architecture specs from inception through high-volume Release.
Strong background in computer architecture with a focus on memory systems and memory-semantics interconnects.Strong understanding of scale-up memory fabric and protocolsFamiliarity with GPU memory organization.Experience running detailed performance modeling for computing and/or data movement ASICs.
Familiarity with state-of-the-art distributed ML algorithms